EngineeringComputer EngineeringComputer ScienceCompilersComputer ArchitectureHardware-software Co-designBenchmarkingCompiler ConstructionControl-flow AnalysisHardware AccelerationInstruction Set ArchitectureMicroarchitecture DesignAttributesCisc ArchitecturesComparative Performance EvaluationCompiler SupportConstraintsInstruction Set DesignLevel Playing FieldRisc Architectures
This article shows that RISC performance estimates, when compared to alternative conventional CISC (such as VAX, S/360, etc.) approaches, seem impressive. While there have been critical appraisals of the RISC approach, the comparative performance evaluations provide formidable, although qualified, evidence in its favor. The purpose here is to evaluate and compare RISC-type designs with non-RISC instruction-set extensions using a level playing field: with similar compiler strategies, without compatibility considerations, and with similar implementation constraints. The author also deal with instruction set evaluation. The data presented is based on five benchmark programs discussed later. Instruction sets have many attributes as well as constraints. The key to careful instruction set evaluation is to consider key attributes and the tradeoffs possible among them in light of implementation constraints.
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Hennessy · IEEE Transactions on Computers · 1984 · 215 citations
David A. Patterson, Carlo H. Séquin · 1998 · 183 citations
Susan J. Eggers, James R. Larus, George Taylor · Computer · 1986 · 179 citations · Full text
Reduced Instruction Set Computer Architectures for VLSI
Emmanuel Katevenis · 1983 · 148 citations
David Ungar, Ricki Blau, Peter Foley et al. · ACM SIGARCH Computer Architecture News · 1984 · 98 citations · Full text