Publication | Closed Access
Monolithic Silicon Integration of Scaled Photonic Switch Fabrics, CMOS Logic, and Device Driver Circuits
171
Citations
18
References
2013
Year
EngineeringDevice IntegrationIntegrated PhotonicsOptoelectronic DevicesIntegrated CircuitsProgrammable PhotonicsElectronic DevicesHigh-speed ElectronicsOptical SwitchingPhotonic Integrated CircuitNanophotonicsPhotonicsElectrical EngineeringOptical InterconnectsSwitch FabricsMultistage TopologiesSwitch FabricComputer EngineeringDevice Driver CircuitsCmos LogicMicroelectronicsPhotonic DeviceMicrofabricationApplied PhysicsMonolithic Silicon IntegrationOptoelectronics
Chip‑scale switching systems could replace bandwidth‑ and power‑limited electronic switch chips in high‑performance computing. The authors demonstrate 4×4 and 8×8 multistage switch fabrics built from 2×2 Mach–Zehnder interferometers. These fabrics are monolithically integrated on a single chip with digital CMOS logic, device drivers, thermo‑optic and electro‑optic phase tuners using IBM’s 90 nm silicon nanophotonics platform. The integrated systems achieve nanosecond‑scale reconfiguration, low crosstalk, compact footprints, low power dissipation, wide spectral bandwidth, and maintain high‑speed data integrity during sub‑100‑ns dynamic reconfiguration.
We demonstrate 4 × 4 and 8 × 8 switch fabrics in multistage topologies based on 2 × 2 Mach–Zehnder interferometer switching elements. These fabrics are integrated onto a single chip with digital CMOS logic, device drivers, thermo-optic phase tuners, and electro-optic phase modulators using IBM's 90 nm silicon integrated nanophotonics technology. We show that the various switch-and-driver systems are capable of delivering nanosecond-scale reconfiguration times, low crosstalk, compact footprints, low power dissipations, and broad spectral bandwidths. Moreover, we validate the dynamic reconfigurability of the switch fabric changing the state of the fabric using time slots with sub-100-ns durations. We further verify the integrity of high-speed data transfers under such dynamic operation. This chip-scale switching system technology may provide a compelling solution to replace some routing functionality currently implemented as bandwidth- and power-limited electronic switch chips in high-performance computing systems.
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