2010 · 27 citations · 10 references
EngineeringCommunicationElectrical EngineeringAnalog ElectronicsDigital CommunicationMicroelectronicsAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated CircuitsDigital Signal ProcessingMixed-signal Integrated Circuit DesignPower OptimizationAnalog-digital ConversionAnalog-to-digital ConversionAnalog-to-digital ConvertersBit Error RateCommunication ChannelsPower ConsumptionPower Reduction TechniquesQuantization
In this paper, we propose BER-optimal analog-to-digital converters (ADC) where quantization levels and thresholds are set non-uniformly to minimize the bit-error rate (BER). This is in contrast to present-day ADCs which act as transparent waveform preservers. Simulations for various communication channels show that the BER-optimal ADC achieves shaping gains that range from 2.5dB for channels with low intersymbol interference (ISI) to more than 30dB for channels with high ISI. Moreover, a 3-bit BER-optimal ADC achieves the same or even lower BER than a 4-bit uniform ADC. For flash converters, this corresponds a power reduction by 2×. Look-up table based equalizers compatible with BER-optimal ADCs are shown to reduce the power up to 47% and the area up to 66% in a 45nm CMOS process. The shaping gain due to BER-optimal ADCs can be exploited to lower peak transmit swings at the transmitter or decrease power consumption of the ADC.
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Least squares quantization in PCM
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