Effect of growth orientation and surface roughness on electron transport in silicon nanowires

Abstract

We report a study of the effect of growth orientation and surface roughness on electron transport in small-diameter hydrogen passivated silicon nanowires (NWs). We employ a nonequilibrium Green's function technique within an $s{p}^{3}{d}^{5}{s}^{*}$ tight-binding approximation to show that band structure strongly affects current-voltage characteristics of ideal NWs, leading to current falloff at high drain bias for certain growth orientations. Surface roughness suppresses small bias conductance and current, and leads to a nonmonotonic dependence on gate bias. We also find that surface roughness results in a decrease of current with the length of a NW. The rate of the decrease depends on the growth directions and diameter. As the diameter of a NW becomes smaller, a transition of electron transport to Anderson localization regime may occur even at room temperature.