An FPGA Implementation of the Resolve Time-Based True Random Number Generator With Quality Control

Abstract

This article describes a novel concept of a true random generator (TRNG) which exploits random behavior from a nearly-metastable operation of groups of FPGA flip-flops in opposite to many deep-metastability-based TRNGs. The proposed concept harvests random behavior from the resolve time, which occurs in a wider range of flip-flop's operation than the deep-metastability. Application of the resolve time randomness, requires the use of specially designed arbiter blocks. Presented TRNG provides a high stability of statistical quality which usually varies with PVT in similar solutions. Moreover, the use of an adaptive feedback loop increases robustness of the device. The article also describes the design considerations related to the adjustment of a flip-flop operating point, randomness extraction, and circuit fitting strategy.