Gate-Bias Stress Stability of P-Type SnO Thin-Film Transistors Fabricated by RF-Sputtering

Abstract

The gate-bias stress stability of p-type tin monoxide (SnO) thin-film transistors (TFTs) is investigated. The SnO TFT exhibits a threshold voltage of 2.5 V, a field-effect hole mobility of 0.24 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> V <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> s <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> , a sub-threshold swing of 2 V/decade, and an ON/OFF current ratio of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> . Under gate-bias stress, the transfer characteristics shift with the same polarity as the stress voltage, whereas the sub-threshold swing and field-effect mobility remain almost unaltered. The threshold voltage shifts under various gate-bias stress voltages are well fitted by the stretch-exponential equation. This indicates that the dominant mechanism of the threshold voltage shift is the charge trapping at the interface between the active layer and the gate dielectric or at the gate dielectric near the interface. Larger amounts of threshold voltage shifts observed in the positive gate-bias stress may be caused by the bias-induced adsorption of oxygen on the unpassivated backchannel surface in addition to charge trapping.