An Algorithm for Optimal Logic Design Using Multiplexers

Abstract

A set of characterizing parameters, called ratio parameters, has been used to formulate an efficient algorithm for realizing any given Boolean funetion with a single multiplexer of minimum size. The algorithm is applicable to fuctions of a large number of variables because the conventional logic design tools, e.g., Karnaugh map, decomposition chart, etc., which are unsuitable for higher variables, have not been used. The algorithm is also simple in computation, iterative in nature, and very suitable for machine implementation.