IEEE Micro · 2010 · 81 citations · 2 references
EngineeringComputer EngineeringComputer SystemsComputer ArchitectureHardware-software Co-designHeterogeneous ComputingInstruction Set ArchitectureInstruction-level ParallelismMicroarchitecture DesignProcessor Core DesignProcessor MicroarchitectureVirtual MemoryInstruction DecodingInstruction Set DesignMulti-core ComputingProcessor ArchitectureProcessor SystemsShared Virtual MemoryVirtual Memory SupportVirtual Memory Systems
The Convey HC-1 is a heterogeneous computing system based on an industry-standard Intel processor and a proprietary coprocessor that share virtual memory and an instruction stream, creating a hybrid-core computing system. The coprocessor architecture supports user-defined, dynamically loadable instruction sets. Managing the decoding, dispatch, and execution of completely user-defined instructions requires an innovative approach to system design and operation.
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The verilog hardware description language
Microelectronics Journal · 1992 · 114 citations · Full text