Simple and Scalable Methodology for Equivalent Circuit Modeling of IC Packages

Abstract

This paper presents a methodology for scalable modeling of IC packages by lumped element equivalent circuits. The response surface methodology is used for modeling of the IC package pins, lead frame, and bond wires, whereas the paddle is modeled as a pair of planes. The design of experiment (DOE) approach is used to systematically vary geometrical parameters of the simplified package structures, which are then simulated in a 3-D electromagnetic (EM) simulator. These simplified structures are used as building blocks of the IC packages and EM simulations of the simplified structures are used to build their parameterized equivalent circuit models. The extracted parameters of the equivalent circuit model form the response surface. Simple regression models are used for the response surface modeling. The model of the whole IC package is generated by cascading the models of the simplified structures. The range of the geometrical parameters used in the DOE is selected to cover a wide range of IC package geometries. The response surface models are verified against measurements performed on several IC package types and the accuracy is very good. The scalability and accuracy of the response surface models make this methodology suitable for modeling of a wide range of IC packages. The efficiency and accuracy of the presented models enable the statistical analysis of package performance with respect to package manufacturing parameters.