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Microstructure of high-temperature annealed buried oxide silicon-on-insulator
73
Citations
8
References
1986
Year
Materials ScienceElectrical EngineeringEngineeringTop Silicon LayerCrystalline DefectsOxide ElectronicsApplied PhysicsAnnealing TemperatureSemiconductor MaterialBuried Oxide SoiSemiconductor Device FabricationIntegrated CircuitsSilicon On Insulator
The microstructure of buried oxide silicon-on-insulator (SOI) annealed in the temperature range of 1150–1300 °C was examined. The microstructure of the buried oxide SOI was improved by increasing the annealing temperature. The minimum channeling yield of the top silicon layer in 1250 °C annealed SOI measured by Rutherford backscattering and channeling analysis is 5% which is comparable to unprocessed bulk single crystal material. This is further verified by the cross-sectional transmission electron microscopy observation of the precipitate-free top silicon layer with low dislocation density. The improvement in the microstructure is attributed to the dissolution of oxygen precipitates and oxygen outdiffusion during high-temperature annealing.
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