A new page table for 64-bit address spaces

Abstract

Most computer architectures are moving to 64-bit virtual address spaces. We first discuss how this change impacts conventional linear, forwardmapped, and hashed page tables. We then introduce a new page table data structure—clustered page table—that can be viewed as a hashed page table aug-mented with subblocking. Specifically, it associates mapping information for several pages (e.g., sixteen) with a single virtual tag and next pointer. Simulation results with several workloads show that clustered page tables use less memory than alternatives with-out adversely affecting page table access time. Since physical address space use is also increas-ing, computer architects are using new techniques— such as superpages, complete-subblocking, and partial-subblocking—to increase the memory mapped by a translation lookaside buffer (TLB). Since these tech-niques are completely ineffective without page table support, we next look at extending conventional and clustered page tables to support them. Simulation re-sults show clustered page tables support medium-sized superpage and subblock TLBs especially well.