Bulk-drain connected load for subthreshold MOS current-mode logic

Abstract

Bulk-drain connected PMOS transistors are proposed as loads for subthreshold MOS current-mode logic gates. Such loads exhibit an approximately linear dependence of the subthreshold drain-source current on the drain-source voltage, guaranteeing robust gate operation. The design and performance of an inverter gate and ring oscillator in a 0.25 µm CMOS technology are presented.