IEEE Journal of Solid-State Circuits · 2005 · 62 citations · 6 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated Circuit DesignDigital Integrated CircuitsLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignAnalog Circuit DesignAnalog-to-digital ConversionAnalog-to-digital Converter DesignCmos Analog Circuit DesignCmos Analog Integrated CircuitsCmos Differential AmplifiersPower ConsumptionSilicon
A 12-bit pipeline ADC fabricated in a 0.18-/spl mu/m pure digital CMOS technology is presented. Its nominal conversion rate is 110 MS/s and the nominal supply voltage is 1.8 V. The effective number of bits is 10.4 when a 10-MHz input signal with 2V/sub P-P/ signal swing is applied. The occupied silicon area is 0.86 mm/sup 2/ and the power consumption equals 97 mW. A switched capacitor bias current generator scales the opamp bias currents automatically with the conversion rate, which gives scaleable power consumption and full performance of the ADC from 20 to 140 MS/s.
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Design of analog integrated circuits and systems
Choice Reviews Online · 1995 · 865 citations
A 3 V 340 mW 14 b 75 MSPS CMOS ADC with 85 dB SFDR at Nyquist
A 1.2V 220MS/s 10b pipeline ADC implemented in 0.13μm digital CMOS
B. Hernes, A. Briskemyr, T.N. Andersen et al. · 2004 · 43 citations