D. Kelly

A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input

Won Sik Yang, D. Kelly, L. Mehr et al. · IEEE Journal of Solid-State Circuits · 2001 · 283 citations

85-Db Sfdr, Typical Differential Nonlinearity, Circuit System +8

A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology

S. Devarajan, Larry Singer, D. Kelly et al. · IEEE Journal of Solid-State Circuits · 2017 · 188 citations

Electrical Engineering, Engineering, Pipeline Analog-to-digital Converter +10

A cascaded sigma-delta pipeline A/D converter with 1.25 MHz signal bandwidth and 89 dB SNR

T.L. Brooks, David Robertson, D. Kelly et al. · IEEE Journal of Solid-State Circuits · 1997 · 170 citations

Dynamic Linearity, Data Converter, Mixed-signal Integrated Circuit +7

A 16-bit, 125 MS/s, 385 mW, 78.7 dB SNR CMOS Pipeline ADC

S. Devarajan, Larry Singer, D. Kelly et al. · IEEE Journal of Solid-State Circuits · 2009 · 115 citations

¿M Cmos Process, Worst Spur, Data Converter +6

A 12 b 65 MSample/s CMOS ADC with 82 dB SFDR at 120 MHz

L. Singer, Stacy Ho, M. Timko et al. · 2002 · 86 citations

Cellular Basestation Design, Db Sfdr, Multibit Pipeline Architecture +13