A W-band 21.1 dBm power amplifier with an 8-way zero-degree combiner in 45 nm SOI CMOS

Abstract

This paper presents a W-band power amplifier (PA) in 45 nm SOI CMOS. The PA incorporates an 8-way zero-degree combiner to efficiently combine 8 parallel PA units, each of which is a 2-stage cascode PA. At 80 GHz, the PA achieves a saturated output power (P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sat</sub> ) of 21.1 dBm, 10.1 dB peak gain, 5.2% peak PAE, and 12 GHz 3-dB bandwidth, and it consumes 1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of die area. The P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sat</sub> of 21.1 dBm is the highest among reported W-band PAs in CMOS technology.