Publication | Closed Access
Optimized Design of a 32-nm CNFET-Based Low-Power Ultrawideband CCII
62
Citations
30
References
2012
Year
Low-power ElectronicsElectrical EngineeringElectronic DevicesEngineeringVlsi DesignRf SemiconductorNanoelectronicsOptimized DesignComputer EngineeringCmos TechnologyCmos CounterpartMicroelectronicsBeyond CmosCarbon NanotubesLine Edge RoughnessElectromagnetic Compatibility
CMOS technology faces significant challenges like tunneling effect, random dopant fluctuation, and line edge roughness at channel lengths below 45 nm. Carbon nanotube-based electronics seems to be a better prospect for extending the saturating Moore's law because of its higher mobility, scalability, and better channel electrostatics. This paper presents an optimum design of a wide bandwidth, high-performance carbon nanotube field-effect transistor (CNFET) realization of a dual-output second-generation current conveyor (CCII±) at a 32-nm technology node. The performance of the CCII module has been thoroughly investigated in terms of number of carbon nanotubes (CNTs), the diameter of CNT and inter-CNT pitch. The parameters of individual CNFET are then modified to further improve the performance. The performance of the optimum CNFET (ITOPT)-based CCII is then compared with CMOS at different supply voltages. It has been found that CNFET-based CCII provides excellent high-frequency response and also consumes lower power at scaled supply voltage compared with its CMOS counterpart.
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