3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE

Abstract

In recent years, the demand for low cost and system-on-a-chip for mobile terminals has led to the development of a highly-integrated, low-distortion, and high-power-efficiency CMOS power amplifier (PA). To improve the power efficiency of the conventional linear PA [1-4], an envelope tracking (ET) technique, which modulates supply voltage of a linear PA, has attracted attention. However, the published power efficiency, gain and output power are not sufficient for LTE applications [5], and its typical implementation requires an external supply modulator that is a high-speed power supply circuit [6]. Envelope elimination and restoration (EER) is an alternative supply modulation technique that can further improve the power efficiency over ET by replacing the linear PA with a switching PA driven by a phase signal [7]. However, to meet the specified low distortion, especially for LTE with a wide bandwidth baseband signal, an EER PA generally has difficulty achieving a wide bandwidth for the phase signal path, and requires a high-speed supply modulator, and highly accurate timing between envelope and phase signals. To overcome these problems, this paper introduces an envelope / phase generator based on a mixer and a timing aligner based on a delay-locked loop. Additionally, they were integrated with a switching PA and a supply modulator on the same die.