SAND80-0843 a SEM Technique for Experimentally Locating Latch-Up Paths in Integrated Circuits

Abstract

A technique has been developed which uses the scanning electron microscope in the electron-beam-induced-current mode to delineate latch-up paths in integrated circuits. It is rapid, easy to use, and requires no special sample preparation. The technique is discussed and applied to simple circuits for easy verification of its accuracy. Results on more complicated circuits are then presented. On some complex parts (1K-bit RAMS) multiple latch paths were found which could be active simultaneously and which depended on the history or internal state of the device.