Area-efficient RC low pass filter using T-networked resistors and capacitance multiplier

Abstract

A low pass filters (LPFs) are important building blocks for many analog integrated circuit design. The biomedical applications or the sensor applications require the LPFs with very low cut-off frequency. The simplest way to implement the LPF is using the passive RC filter. The passive RC LPF, however, consumes large chip area when the desired time constant is large. The transconductance-C (g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> -C) filter or the switched capacitor (SC) filters are widely used to achieve the low cut-off frequency in limited area. However, non-linearity and switching noise are major drawbacks of the g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> -C filters and the SC filters. This paper presents an area-efficient LPF using T-networked resistors and current-mode capacitance multiplier. The area of the proposed LPF is reduced to 8.31 % of the conventional passive RC LPF at the same cut-off frequency of 7.1 kHz. The proposed LPF is designed using standard 0.18 μm CMOS process with the option process of high-resistivity polysilicon resistor and metal-insulator-metal capacitor.