IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2013 · 13 citations · 9 references
EngineeringComputer EngineeringComputer ScienceDesign AutomationFormal MethodsSystem-on-chip DesignDeductive VerificationPower AnalysisPower ManagementPower-aware DesignVerificationAutomated Coverage VerificationCoverage AnalysisCoverage-driven VerificationFormal Hardware VerificationFormal VerificationPower Intent SpecificationPower Management DesignSystem-on-chip Architecture
With the growing complexity and gradually shrinking power requirements in the system-on-chip designs, sophisticated global power management policies (which orchestrate the switching between power states of multiple power domains) are commonplace. Recent research has paved some novel ways to verify the sophisticated on-chip architectural power management decisions and analyze the verification coverage. However, one of the primary challenges in verifying such power management architectures stems from the mixed implementation of such strategies, where the local power controllers are in hardware and the global power management is implemented in software/firmware. There has been lack of effort to build a unified and automated framework for power intent verification and coverage analysis for generic power management logics. This paper tries to develop an end-to-end automated framework enabled by a tool named POWER-TRUCTOR for power intent validation.
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