IEEE Transactions on Circuits and Systems · 1989 · 84 citations · 8 references
EngineeringNeural Networks (Machine Learning)Computer ArchitectureHardware SystemsSocial SciencesUnconventional ComputingComputing SystemsModeling And SimulationNeuromorphic EngineeringParallel ComputingNeurocomputersComputer EngineeringComputer ScienceNeural Networks (Computational Neuroscience)Neural Architecture SearchEvolving Neural NetworkCellular Neural NetworkComputational NeuroscienceDigital Shift RegistersMassive ParallelismNeuronal NetworkDigital ArchitectureHopfield Neural NetsBrain-like Computing
A digital architecture which uses stochastic logic for simulating the behavior of Hopfield neural networks is described. This stochastic architecture provides massive parallelism (since stochastic logic is very space-efficient), reprogrammability (since synaptic weights are stored in digital shift registers), large dynamic range (by using either fixed- or floating-point weights), annealing (by coupling variable neuron gains with noise from stochastic arithmetic), high execution speed ( approximately=N*10/sup 8/ connections per second), expandability (by cascading of multiple chips to host large networks), and practicality (by building with very conservative MOS device technologies). Results of simulations are given which show the stochastic architecture gives results similar to those found using standard analog neural networks or simulated annealing.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Neural networks using analog multipliers
J.J. Paulos, P.W. Hollis · 2003 · 23 citations
Neural Network Implementation, Electrical Engineering, Engineering +15