3D Compact Model of Packaged Thermoelectric Coolers

Abstract

Hotspots on a microelectronic package can severely hurt the performance and long-term reliability of the chip. Thermoelectric coolers (TECs) can provide site-specific and on-demand cooling of hot spots in microprocessors. We develop a 3D compact model for fast and accurate modeling of a TEC device integrated inside an electronic package. A 1D compact model of a TEC is first built in SPICE and validated for steady-state and transient behavior against a finite-volume model. The 1D compact model of the TEC is then incorporated into a 3D compact model of a prototype electronic package. The results from the compact model for the packaged TEC are in good agreement with a finite-volume based model, which confirms the compact model's ability to accurately model the TEC's interaction with the package. Analysis of packaged TECs using this 3D compact model shows that (i) moving TECs closer to the chip results in faster response time and an increase in maximum cooling, (ii) high thermal contact resistance within the thermoelectric cooler significantly degrades performance of the device, and (iii) higher convective heat transfer coefficients (HTC) at the heat spreader surface increase steady-state cooling but decrease maximum transient cooling.