Publication | Closed Access
Regular step arrays on silicon
138
Citations
21
References
1998
Year
Vicinal SiEngineeringPhysicsCrystalline DefectsMinimum Kink WidthApplied PhysicsComputer EngineeringSemiconductor Device FabricationHighly Regular ArraysInstrumentationSilicon On InsulatorMicroelectronicsCrystallographyRegular Step ArraysSilicon Debugging
Highly regular arrays of steps are produced on vicinal Si(111)7×7. The step edges are atomically straight for up to 2×104 lattice sites. The terraces are single domain, which produces a minimum kink width of 2.3 nm (half a 7×7 unit cell) and thus a high barrier for creating kinks. Criteria for obtaining optimum step arrays are established, such as the miscut [≈1° towards (1̄1̄2)] and an annealing sequence which passes through step bunching regions quickly.
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