IEEE Journal of Solid-State Circuits · 2013 · 14 citations · 15 references
EngineeringElectrical EngineeringDigital CommunicationLow-power DesignWireless CommunicationsCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyImpedance Matching CircuitsMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsReceiver SystemsHigh-speed OperationNyquist FrequencyPower EfficiencyRadio Frequency Front EndsReceiver ArchitectureReceiver DesignReceiver Front-endsTransceiver Design
This paper describes a low-power receiver front-end in a bidirectional near-ground source-series terminated (SST) interface implemented in a 40-nm CMOS process, which supports low-common mode differential NRZ signaling up to 16-Gb/s data rates. The high-speed operation is enabled by utilizing a common-gate amplifier stage with replica transconductance impedance calibration that accurately terminates the channel in the presence of receiver input loading. The near-ground low-impedance receiver also incorporates common-mode gain cancellation and in-situ equalization calibration to achieve reliable data reception at 16 Gb/s with better than 0.4 mW/Gb/s power efficiency over a memory link with more than 15 dB loss at the Nyquist frequency.
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A 14-mW 6.25-Gb/s Transceiver in 90-nm CMOS
John W. Poulton, R. Palmer, Andrew M. Fuller et al. · IEEE Journal of Solid-State Circuits · 2007 · 240 citations
Engineering, Computer Engineering, Electrical Engineering +17
A 27-mW 3.6-Gb/s I/O Transceiver
K.-L.J. Wong, Hamid Hatamkhani, Mozhgan Mansuri et al. · IEEE Journal of Solid-State Circuits · 2004 · 121 citations
Engineering, Computer Engineering, Electrical Engineering +17
A 10-bit, 20-MS/s, 35-mW pipeline A/D converter
T.B. Cho, P.R. Gray · 2002 · 76 citations
Engineering, Computer Engineering, Electrical Engineering +17