2010 · 21 citations · 7 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsAnalog IntegrationCmos Circuit DesignLow-noise Circuit DesignLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignMixed-signal IntegrationAnalog-to-digital Converter DesignCmos Analog Circuit DesignCmos Analog Integrated CircuitsCmos Digital Circuit DesignModulation BandwidthPower Consumption
A reconfigurable cascaded continuous-time 3-1 ΔΣ modulator with low PVT sensitivity was developed and implemented in 65nm digital CMOS. The 0.17mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> chip achieves 67/55dB SNR and 70/61dB DR at 10/15MHz bandwidth with only 208MHz clock frequency and 10.5mW power consumption from a 1.3V supply.
7
Gerhard Mitteregger, Christian Ebner, Stephan Mechnig et al. · IEEE Journal of Solid-State Circuits · 2006 · 315 citations
Engineering, Computer Engineering, Electrical Engineering +17
Matthias Keller, Alexander Buhmann, J. Sauerbrey et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2008 · 128 citations