A graph theoretical approach to equivalence of multistage interconnection networks

References

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	Year	Citations
Access and Alignment of Data in an Array Processor Duncan H. Lawrie IEEE Transactions on Computers Hardware SecurityPrimary Memory SystemArray ComputingEngineeringProgram Analysis	1975	1.1K
A Survey of Interconnection Networks Tse-Yun Feng Computer Network ScienceEngineeringIp InterconnectionMultiprocessor SystemMemory Modules	1981	796
On a Class of Multistage Interconnection Networks Chuan-Lin Wu, Tse-Yun Feng IEEE Transactions on Computers EngineeringNetwork PlanningComputer ArchitectureNetwork AnalysisEducation	1980	741
The Indirect Binary n-Cube Microprocessor Array Pease IEEE Transactions on Computers Computational FacilityMassively-parallel ComputingArray ComputingEngineeringParallel Software	1977	500
Graph Theoretical Analysis and Design of Multistage Interconnection Networks Agrawal IEEE Transactions on Computers EngineeringComputer ArchitectureNetwork AnalysisInterconnection Network ArchitectureSw Banyan Network	1983	186
Data Manipulating Functions in Parallel Processors and Their Implementations Tse-Yun Feng IEEE Transactions on Computers EngineeringComputer ArchitectureParallel ImplementationManipulating FunctionsMasking Functions	1974	162
A unified theory of interconnection network structure Clyde P. Kruskal, Marc Snir Theoretical Computer Science Network ScienceGraph TheoryEngineeringComputer EngineeringNetwork Analysis	1986	107
Equivalence of multistage interconnection networks Jean Claude Bermond, Jean Michel Fourneau, Alain Jean‐Marie Information Processing Letters Multistage Interconnection NetworksEngineeringGraph TheoryComputer EngineeringNetwork Analysis	1987	25

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