The mechanism of electrical annihilation of conductive paths and charge trapping in silicon-rich oxides

Abstract

The electrical properties of silicon-rich oxide (SRO) films in metal-oxide-semiconductor-like structures were analysed by current versus voltage (I-V) and capacitance versus voltage (C-V) techniques. SRO films were thermally annealed to activate the agglomeration of the silicon excess in the form of nanoparticles (Si-nps). High current was observed at low negative and positive voltages, and then at a certain voltage (V(drop)), the current dropped to a low conduction state until a high electric field again activated a high conduction state. C-V measurements demonstrated a capacitance reduction at the same time as the current dropped, but without appreciable flat-band voltage (V(FB)) shifting. The reduction in capacitance and current was also observed after applying an electrical stress. These effects are ascribed to the annihilation of conductive paths created by Si-nps. An equivalent circuit is used to explain the capacitance and current reductions. Finally, the conduction mechanism is also analysed by making use of trap assisted tunnelling and Fowler-Nordheim tunnelling at low and high electric fields, respectively.