The inflection point of the capacitance-voltage, C(VG), characteristic and the flat-band voltage of metal-oxide-semiconductor structures

Abstract

In a recently published paper, suggestions have been contained concerning close relations existing between the position of the inflection point on the capacitance-voltage, C(VG), characteristic of the metal-oxide-semiconductor (MOS) structure and the position of the flat-band voltage of this structure. In this article, a systematic, quantitative analysis of this problem is presented. The analysis of the relations existing between the voltage of the inflection point VINFL on the capacitance-voltage, C(VG), characteristic and the flat-band voltage, VFB, of a MOS structure is conducted for ideal and non-ideal (but with negligible density of interface states, Dit) MOS structures on silicon and silicon carbide substrates. It is found that, in general, there is a significant difference between the VINFL and the VFB values. The VINFL − VFB difference is found to depend primarily on the substrate doping density ND and on the dielectric layer thickness tOX. This difference is calculated for a range of ND and tOX values for structures with negligible Dit values on silicon and silicon carbide substrates. Experiments are described which were conducted to allow comparison of calculated and experimentally obtained VINFL values of different MOS structures on Si and SiC substrates. Results of these experiments support the quantitative results of our analysis for structures with negligible densities of interface states. As expected, for structures with higher Dit values, significant differences are found between calculated and experimentally obtained VINFL values.