Spur-Suppression Techniques for Frequency Synthesizers

Che-Fu Liang, Hsin‐Hua Chen, Shen-Iuan Liu

IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2007 · 37 citations · 11 references

Concepts

Abstract

A frequency synthesizer with two spur-suppression circuits has been fabricated in 0.18 mum CMOS technology. The chip area is 1.3 mm times 1.3 mm. The frequency synthesizer consumes 18.9 mW from a 1.8-V supply. Compared with the conventional frequency synthesizer without the spur-suppression circuit, the measured reference spur at 8 MHz is reduced by 18 dBc for the first spur-suppression circuit and 31 dBc for the second one. The measured switching time from 1792 to 1824 MHz is 27.89 mus within 20 ppm of the target frequency.

References

11