Proposal for Surface Tunnel Transistors

Abstract

A new three-terminal tunnel device, the surface tunnel transistor (STT), is proposed and its operation is demonstrated using GaAs/AlGaAs. STT consists of n + /i/p + diode structure with an insulated gate in the i-region, which is similar to a MOSFET. However, the source and drain are oppositely doped. The most important feature of this device is that the drain must be so highly degenerated that a tunnel junction is formed with a two-dimensional (2D) electron channel under the gate. The tunneling current from source to drain is controlled by the gate bias through the concentration of accumulated 2D electrons under the gate. GaAs STTs with i-Al 0.6 Ga 0.4 As as a gate insulator are fabricated using MBE regrowth techniques on a mesa structure. This device exhibits transistor characteristics at 77 K and at room temperature, which confirms the new operation principle of STTs.