Publication | Closed Access
A 90-nm Low-Power FPGA for Battery-Powered Applications
129
Citations
23
References
2007
Year
EngineeringEnergy EfficiencyComputer ArchitecturePower OptimizationPower ElectronicsHardware SecurityNanoelectronicsPower-aware DesignPower ManagementElectrical EngineeringEnergy HarvestingPower-aware ComputingComputer EngineeringProgrammable Logic DevicesComputer ScienceMicroelectronicsFpga DesignLow-power Electronics90-Nm Low-power FpgaLow-power Fpga CorePower-efficient ComputingField-programmable Gate Arrays
FPGAs are versatile programmable logic devices, yet their higher power consumption and lack of power‑management features limit their use in battery‑powered applications. This work presents Pika, a low‑power FPGA core designed specifically for battery‑powered systems. Pika is built on a commercial low‑cost FPGA and implemented in a 90‑nm triple‑oxide CMOS process, incorporating a series of power‑optimization techniques that enable compatibility with existing commercial design tools. Compared to the baseline, Pika achieves 46 % less active power, 99 % less standby power, preserves circuit and configuration state during standby, and wakes from standby in about 100 ns.
Programmable logic devices such as field-programmable gate arrays (FPGAs) are useful for a wide range of applications. However, FPGAs are not commonly used in battery-powered applications because they consume more power than application-specified integrated circuits and lack power management features. In this paper, we describe the design and implementation of Pika, a low-power FPGA core targeting battery-powered applications. Our design is based on a commercial low-cost FPGA and achieves substantial power savings through a series of power optimizations. The resulting architecture is compatible with existing commercial design tools. The implementation is done in a 90-nm triple-oxide CMOS process. Compared to the baseline design, Pika consumes 46% less active power and 99% less standby power. Furthermore, it retains circuit and configuration state during standby mode and wakes up from standby mode in approximately 100 ns
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