IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences · 2005 · 18 citations · 7 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignCmos Circuit DesignCurrent-voltage CharacteristicsIntegrated Circuit DesignMetal-oxide-semiconductor Field-effect TransistorsSmall-signal AnalysisTransistor BiasingBias Circuit DesignBiasesCircuit SynthesisCmos Analog Integrated CircuitsCmos Current MirrorsComplementary Current MirrorsComplementary Metal-oxide-semiconductor BiasingCurrent Mirror Design
A systematic method is introduced to the computational synthesis of CMOS voltage followers (VFs). The method is divided in three steps: generation of the small-signal circuitry by selection of nullators to model the behavior of a VF, and addition of norators to form nullator-norator joined-pairs; generation of the bias circuitry by addition of ideal biases according to the properties of nullators and norators; and synthesis of the joined-pairs by MOSFETs, and of the current-biases by CMOS current mirrors. It is shown that the proposed synthesis method has the capability to generate already known and new CMOS VF topologies.
7
Class AB CMOS first-generation current conveyor
Erik Bruun · Electronics Letters · 1995 · 34 citations
Engineering, Computer Engineering, Electrical Engineering +12
Rail-to-rail low-power high-slew-rate CMOS analogue buffer
Juan M. Carrillo, R.G. Carvajal, A. Torralba et al. · Electronics Letters · 2004 · 24 citations