Self-aligned sidewall gated resonant tunneling transistors

Abstract

Three-terminal vertical quantum structures using a self-aligned sidewall gating technique have been developed. Resonant tunneling transistors with physical widths of about 0.7 μm demonstrate pinch-off of the resonant peak at room temperature. Comparable gating characteristics for forward and reverse drain-source biases indicate that the gating action is vertically uniform, making this topology suitable for the fabrication of low-dimensional structures and study of multiple quantum well devices.