A scalable substrate noise coupling model for design of mixed-signal IC's

TLDR

This paper presents a design-oriented scalable macromodel for substrate noise coupling in heavily-doped substrates. The model uses only four parameters extracted from a few device simulations or measurements, enabling design across any injection‑sensing spacing and contact geometry, and its scalability with separation and width offers insight into substrate coupling, validated by measurements on 0.5 μm CMOS test structures. The model is validated by measurements on 0.5 μm CMOS test structures and its application to circuit design is demonstrated through simulation results.

Abstract

This paper describes a design-oriented scalable macromodel for substrate noise coupling in heavily-doped substrates. The model requires only four parameters which can be readily extracted from a small number of device simulations or measurements. Once these parameters have been determined, the model can be used in design for any spacing between the injection and sensing contacts and for different contact geometries. The scalability of the model with separation and width provides insight into substrate coupling and optimization issues prior to and during the layout phase. The model is validated with measurements from test structures fabricated in a 0.5 /spl mu/m CMOS process. Applications of the model to circuit design are demonstrated with simulation results.