Application of scanning capacitance microscopy to semiconductor devices

Abstract

In this paper we describe the application of scanning capacitance microscopy (SCM) to two different types of samples: a Si semiconductor sample with three different dopant regions and a ferroelectric thin film deposited on a metal substrate. In our study of the first sample, an anomaly in the SCM signal was observed at the p-n junction when the bias voltage was 0 V. There was a discrepancy between the dC/dV versus bias voltage curves obtained from two different types of measurements: one derived from SCM images taken at various bias voltages, and the other directly measured by sweeping the bias voltage while the probe was located at one position. In the case of the second sample, features seen in images of simultaneously acquired SCM and atomic force microscopy images imply that smaller size grains do not possess ferroelectric properties.