Publication | Closed Access
Impurity gettering to secondary defects created by MeV ion implantation in silicon
78
Citations
19
References
1998
Year
Materials ScienceSemiconductorsIon ImplantationEngineeringDislocation InteractionCrystalline DefectsPhysicsIntrinsic ImpurityApplied PhysicsSecondary DefectsIon RangeSemiconductor Device FabricationDefect FormationMev Ion ImplantationDefect ToleranceSilicon On InsulatorMicrostructureIntrinsic Oxygen
Impurities in MeV-implanted and annealed silicon may be trapped at interstitial defects near the projected ion range, Rp, and also at vacancy-related defects at approximately Rp/2. We have investigated the temperature dependence of impurity trapping at these secondary defects, which were preformed by annealing at 900 °C. The binding energies of Fe, Ni, and Cu are greater at the vacancy-related defects than at extrinsic dislocation loops. During subsequent processing at temperatures up to 900 °C, the amount of these impurities trapped at Rp/2 increases with decreasing temperature while the amount trapped at Rp decreases, with most of the trapped metals located at Rp/2 in samples processed at temperatures ≲ 700 °C. However, intrinsic oxygen is trapped at both types of defects; this appears to have little effect on the trapping of metallic impurities at extrinsic dislocations, but may inhibit or completely suppress the trapping at vacancy-related defects.
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