IEEE Transactions on Circuits and Systems I Regular Papers · 2012 · 14 citations · 28 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsComputer ArchitectureMicroelectronicsAnalog IntegrationDigital Signal ProcessingDistortion AnalysisNoise In Analog CircuitsAnalog-to-digital Converter DesignDecimation ArchitecturesDigital Signal Processing Block ArchitectureDigital-to-analog Converter DesignProbability Density Function Modeling
An analysis of the statistics of multistage (pipeline, SAR, and algorithmic) ADCs with redundancy is performed and the ability to achieve an extra 6 dB of resolution in ADCs with half-bit redundancy is shown due to probability density function (PDF) residue shaping. This paper classifies redundancy techniques to show that only some have properties leading to statistical resolution improvements. When properly implemented, resolution gains are maintained even in the presence of large sub-ADC nonlinearity. ADC design criteria for maximizing these resolution increases through PDF residue shaping are described including improved back-end ADCs, stage comparator offset bounds, and the use of scaled conventional restoring with Z added levels (CRZ) stage redundancy. PDF residue shaped structural improvements are also quantified in relation to ideal and nonideal traditional multistage ADC structures.
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Bin Le, Thomas W. Rondeau, Jeffrey H. Reed et al. · IEEE Signal Processing Magazine · 2005 · 349 citations
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu, Soon-Jyh Chang, Guan‐Ying Huang et al. · 2010 · 310 citations