Cascaded Microresonator-Based Matrix Switch for Silicon On-Chip Optical Interconnection

Abstract

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> This paper reviews developments in cascaded microresonator-based matrix switches for silicon photonic interconnection networks in many-core computing applications. Specifically, we emphasize our recently proposed 5 <formula formulatype="inline"><tex Notation="TeX">$\times$</tex></formula> 5 matrix switch comprising two-dimensionally cascaded microring resonator-based electrooptic switches coupled to a waveguide cross-grid on a silicon chip. The cross-grid adopts low-loss low-crosstalk multimode-interference-based waveguide crossings. Such a microresonator-based matrix switch offers nonblocking interconnections among multiple inputs and multiple outputs, with the key merits of i) a tens to hundreds of micrometers-scale footprint, ii) gigabit/second-scale data transmission, iii) nanosecond-speed circuit-switching, iv) 100-<formula formulatype="inline"><tex Notation="TeX">$ \mu{\hbox{W}}$</tex></formula>-scale dc power consumption per link, and v) large-scale integration for networks-on-chips applications. We analyze in detail the microring resonator-based cross-grid switch design for high-data-rate signal transmission in the context of our proposed 5 <formula formulatype="inline"> <tex Notation="TeX">$\times$</tex></formula> 5 matrix switch. We also study the feasibility of large-scale integration of the matrix switch. We report proof-of-concept experiments of a single cross-grid switch element and a 2 <formula formulatype="inline"><tex Notation="TeX">$\times$</tex></formula> 2 matrix switch, propose design guidelines, and discuss future engineering challenges. </para>