Double-Emitter HCBT Structure—A High-Voltage Bipolar Transistor for BiCMOS Integration

Abstract

Fabrication of a novel high-voltage double-emitter horizontal current bipolar transistor (HCBT) structure integrated with the standard 0.18- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu\hbox{m}$</tex></formula> CMOS and high-speed HCBT is presented. The device takes advantage of 3-D collector charge sharing to achieve full depletion of the intrinsic collector region and to limit the electric field at the base–collector junction. Transistors with <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$BV_{\rm CEO} = \hbox{12.6}\ \hbox{V}$</tex></formula> , <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$f_{T} \cdot BV_{\rm CEO} = \hbox{160}\ \hbox{GHz}\cdot \hbox{V}$</tex></formula> , and <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\beta \cdot VA = \hbox{28}\,\hbox{700}\ \hbox{V}$</tex></formula> are demonstrated. The device is fabricated in HCBT BiCMOS process flow without the use of additional lithography masks and represents a zero-cost solution for integration of a high-voltage bipolar device.