FLOSS: an approach to automated layout for high-volume designs

Y. E. Cho, A. J. Korenjak, D. E. Stockton

Design Automation Conference · 1977 · 45 citations · 12 references

Concepts

Abstract

Traditionally, automatic IC layout programs have been constrained to produced designs in which cells are placed in rows.The resulting chips are typically too large, compared to manual layout, to be used for high-volume production. FLOSS uses a new approach - automatic packing of a manually-generated sketch - to achieve chip area that is competitive with manual layout.

References

12