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Comments on "A module generator for optimized CMOS buffers
18
Citations
2
References
1993
Year
N-channel TransistorElectrical EngineeringEngineeringVlsi DesignHigh-performance ArchitectureCmos InverterBias Temperature InstabilityComputer EngineeringComputer ArchitectureLoad CapacitorComputer ScienceProcessor ArchitectureParallel ComputingMicroelectronicsBeyond CmosOptimized Cmos Buffers
For the original article see ibid., vol.9, no.10, p.1028-46 (1990). In the above-titled paper A.J. Al-Khalili et al. claim that the expression derived by the commenters (1987) for the short-circuit energy dissipation per transition for a CMOS inverter while the n-channel transistor is discharging the load capacitor is not correct, and they suggest that some mistakes were made during the integration. The commenters point out that a rederivation showed that their expression is correct, and even if it is given for equal p- and n-channel transistors, it can easily be generalized to arbitrary p- and n-channel transistor sizes.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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