2014 · 21 citations · 9 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureCryptographyField-programmable Gate ArraysCryptographic HashingField-programmable Gate Array ArchitectureFpga ArchitectureHardware AccelerationHash FunctionsHash TablesCryptographic Accelerator DesignCryptographic AcceleratorsHardware Acceleration For CryptographyHash Function AnalysisHash Function AttacksHash Function DesignHash Function ImplementationHash-based Cryptography
High-speed hardware for Keccak, which was selected as a new standard hash function named SHA-3, was developed and its performance was evaluated against SHA-1 and -2 circuits through the use of various FPGA platforms. The results showed that Keccak is suitable for high-speed hardware implementations, but it is getting harder to implement on new FPGA devices, due to the current trends in architecture for state-of-the-art FPGAs. We also clarify the drawbacks of Keccak due to its structure.
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FPGA Implementations of the Round Two SHA-3 Candidates
Brian Baldwin, Andrew W. Byrne, Liang Lu et al. · 2010 · 95 citations
FPGA-based Design Approaches of Keccak Hash Function
George Provelengios, Paris Kitsos, Nicolas Sklavos et al. · 2012 · 37 citations