Improvement of CMOS latch-up immunity using a high energy implanted buried layer - Concepedia

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Improvement of CMOS latch-up immunity using a high energy implanted buried layer

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References

1989

Year

Hsiao‐Yi Lin, C. H. Ting

Nuclear Instruments and Methods in Physics Research Section B Beam Interactions with Materials and Atoms

Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignCmos Latch-up ImmunityComputer EngineeringHigh EnergyMicroelectronics

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