Built-In Self-Test for Phase-Locked Loops

TLDR

The paper presents an effective built‑in self‑test (BIST) structure for phase‑locked loops in digital applications. The BIST leverages the PLL’s existing blocks, adding only minor digital circuitry and a slight digital modification, to detect faults in the phase detector, charge pump, loop filter, VCO, and divide‑by‑N. Physical chip design and fault‑simulation results show the BIST achieves high fault coverage (97.2%) with minimal area overhead (2.78%) while producing digital test outputs that enhance reliability.

Abstract

An effective built-in self-test (BIST) structure of a phase-locked loop (PLL) in digital applications is presented in this paper. The proposed BIST structure can identify possible faults in any block such as the phase detector, charge pump, loop filter, voltage-controlled oscillator and divide-by-N of the PLL. The key advantage of this approach is that it uses all existing blocks in PLL for measuring and testing, reducing the chip area overhead. Restated, the proposed approach does not alter any existing analog circuits. Rather, the proposed approach only adds some small circuits to the PLL and requires a slight modification of the digital part. The final test outputs are digital values which can increase the reliability of the proposed BIST structure. Physical chip design and fault simulation results indicate the characteristics of the proposed BIST structure, namely, high fault coverage (97.2%) and low area overhead (2.78%).