2014 · 37 citations · 23 references
ComputingComputer ScienceComputer SystemsFault ToleranceFault-tolerant ComputingFault-tolerant SystemsError DetectionError HandlingError RecoveryMemory ManagementReliable System DesignSoftware Fault ToleranceMemory CheckpointingMemory Error DetectionMemory Error HandlingMemory Fault HandlingMemory Fault TolerancePerformance OverheadPerformance Overhead Analysis
Today's HPC systems use two mechanisms to address main-memory errors. Error-correcting codes make correctable errors transparent to software, while checkpoint/restart (CR) enables recovery from uncorrectable errors. Unfortunately, CR overhead will be enormous at exascale due to the high failure rate of memory. We propose a new OS-based approach that proactively avoids memory errors using prediction. This scheme exposes correctable error information to the OS, which migrates pages and off lines unhealthy memory to avoid application crashes. We analyze memory error patterns in extensive logs from a BG/P system and show how correctable error patterns can be used to identify memory likely to fail. We implement a proactive memory management system on BG/Q by extending the firmware and Linux. We evaluate our approach with a realistic workload and compare our overhead against CR. We show improved resilience with negligible performance overhead for applications.
23
Bianca Schroeder, Eduardo Pinheiro, Wolf-Dietrich Weber · 2009 · 556 citations
The IBM Blue Gene/Q Compute Chip
R.A. Haring, Martin Ohmacht, Thomas Fox et al. · IEEE Micro · 2011 · 280 citations
Engineering, Computer Engineering, High-performance Computing +17