Dynamic degradation of a-InGaZnO thin-film transistors under pulsed gate voltage stress

Abstract

Instability of amorphous InGaZnO thin-film transistors under pulsed gate voltage (Vg) stress with steep transitions was experimentally investigated. The device threshold voltage (Vth) shifts positively depending on the number of pulse repetitions of the applied Vg pulses. For steeper pulse falling time (tf), more degradation occurs. In addition, for different base voltages of the Vg pulses, the maximum Vth degradation occurs under the condition that Vg pulses are symmetric about the flat band voltage. Such dynamic degradation is attributed to hot-carrier induced charge injection into the gate insulator and/or trapping at the interface near the source/drain regions during the tf transients.