Concepedia

Design space exploration for 3D architectures

Yuan Xie, Gabriel H. Loh, Bryan Black, Kerry Bernstein

ACM Journal on Emerging Technologies in Computing Systems · 2006 · 293 citations · 40 references

TL;DR

Interconnects increasingly dominate performance and power in microprocessors, making alternative architectures essential, and 3D integration—stacking multiple device layers with vertical tunneling—offers a promising solution as fabrication becomes viable and CAD tools are needed to explore its design space. This article introduces 3D integration technology, reviews EDA design tools that enable its adoption, and demonstrates implementation of various microprocessor components using 3D technology. The authors implement multiple microprocessor components—such as logic, memory, and interconnect—within a 3D stack, leveraging EDA tools to integrate and optimize these layers. An industrial case study illustrates the feasibility of designing 3D microarchitectures, highlighting initial performance and integration results.

Abstract

As technology scales, interconnects have become a major performance bottleneck and a major source of power consumption for microprocessors. Increasing interconnect costs make it necessary to consider alternate ways of building modern microprocessors. One promising option is 3D architectures where a stack of multiple device layers with direct vertical tunneling through them are put together on the same chip. As fabrication of 3D integrated circuits has become viable, developing CAD tools and architectural techniques is imperative to explore the design space to 3D microarchitectures. In this article, we give a brief introduction to 3D integration technology, discuss the EDA design tools that can enable the adoption of 3D ICs, and present the implementation of various microprocessor components using 3D technology. An industrial case study is presented as an initial attempt to design 3D microarchitectures.