Interface State in Metal–Oxide–Nitride–Silicon Memories Induced by Hole Injection during Program/Erase Cycle Stress

Abstract

The mechanism of interface-state generation in metal–oxide–nitride–silicon (MONOS) memories by program/erase (P/E) cycling was experimentally examined, using the charge measurement technique we developed that allows direct measurement of the amount of charges flowing during P/E operation. The amount of interface state was found to have a strong correlation with the amount of charges flowing during erase operation, irrespective of pulse voltage, pulse width and number of P/E cycles. It was also found that the amount of interface states generated by P/E cycling increases as hole fluence dominates erase operation. These findings suggest that hole injection from Si substrate, rather than electron detrapping from SiN layer or impact-ionized hot hole, is the main cause of the interface-state generation.