2001 · 64 citations · 12 references
EngineeringElectrical EngineeringDesign AutomationMicroelectronicsOptimizationAnalog IntegrationCmos Circuit DesignIntegrated Circuit DesignLinear Circuit AnalysisTolerance ModelingVery-large-scale Integration LayoutCircuit OptimizationComputer-aided Design For Integrated CircuitsDevice Mismatch AnalysisLinearizationMismatch AnalysisTolerancesWorst-case OptimizationYield Optimization
We present a new method for mismatch analysis and automatic yield optimization of analog integrated circuits with respect to global, local and operational tolerances. Effectiveness and efficiency of yield estimation and optimization are guaranteed by consideration of feasibility regions and by performance linearization at worst-case points. The proposed methods were successfully applied to two example circuits for an industrial fabrication process. 1.
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