Epitaxial layer enhancement of n-well guard rings for CMOS circuits

Abstract

n-well guard rings have long been used for isolating potential electron injectors to avoid latch-up of CMOS circuits. Such guard rings are shown to be orders of magnitude more efficient for CMOS fabricated in an epitaxial layer (epi-CMOS) than for bulk (non-epi) CMOS. The maximum escape probability in epi-CMOS measures 3.9E-06 while for bulk CMOS it is 1.8E-02.